Live Demonstration: SoC Design of Lightweight Cryptography for Real-Time Monitoring System

This live demonstration shows a low-cost but high-performance hardware IP for video stream encryption and authentication on real-time monitoring system. The proposed IP is essentially based on the established standard of lightweight cryptography (LWC) by NIST in 2023, which is called Ascon cipher. For maintaining the frame rate of the video, a high-speed and low-cost hardware IP is proposed with a step-by-step setup procedure introduced in this brief. Given that the recursive permutation of Ascon algorithm, the cost of the proposed Ascon cipher IP can be sustainably reduced by round-based design. The video stream encryption system is realized on Xilinx PYNQ-Z2 board with some peripheral IPs embedded in that FPGA board. Implementation results show the designed IP and the SoC system can perform better than the previous work.

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Publication Details

Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043741
Primary Topic
Embedded Systems Design Techniques
Type
article
Field-Weighted Citation Impact
0.00

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Live Demonstration: SoC Design of Lightweight Cryptography for Real-Time Monitoring System

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Live Demonstration: SoC Design of Lightweight Cryptography for Real-Time Monitoring System

Narn-Yih Lee, Yucheng Huang, Yi-Hsuan Lee, Po‐Chun Chen, Pei-Yin Chen, C.T. Chuang
article en

Abstract

This live demonstration shows a low-cost but high-performance hardware IP for video stream encryption and authentication on real-time monitoring system. The proposed IP is essentially based on the established standard of lightweight cryptography (LWC) by NIST in 2023, which is called Ascon cipher. For maintaining the frame rate of the video, a high-speed and low-cost hardware IP is proposed with a step-by-step setup procedure introduced in this brief. Given that the recursive permutation of Ascon algorithm, the cost of the proposed Ascon cipher IP can be sustainably reduced by round-based design. The video stream encryption system is realized on Xilinx PYNQ-Z2 board with some peripheral IPs embedded in that FPGA board. Implementation results show the designed IP and the SoC system can perform better than the previous work.

National Science and Technology Council
Openalex Percentile: Top 85%
Embedded Systems Design Techniques
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