Analog Linearization of VCO-based ADCs with Machine-Learning-Assisted Co-Design

This paper presents a machine-learning (ML)-assisted co-design framework for the optimization of open-loop analog linearization in VCO-based ADCs. A deep neural network (DNN) surrogate model is trained on a dataset generated by transistor-level transient simulations of the VCO’s voltage-to-frequency (V -to-f) characteristic. The vast multi-dimensional optimization landscape provided by the VCO’s embedded linearization tuning ‘knobs’ make exhaustive search infeasible. The DNN model enables a rapid exploration of this tuning-knobs landscape to minimize the harmonic-distortion (HD) through an evolutionary genetic algorithm (GA). The ‘predicted’ optimal tuning-knob values are transferred back into the local Cadence simulation environment for further fine-grained gradient-descent adaptation via an integrated Verilog-A self-calibration engine. Applied to the coupled-oscillator-ensemble (COE) circuit architecture, the tuning-knob configurations inferred by the DNN-GA yield simulated third-order HD of 42–52dB for the VCO-based ADC, with a boost to >60dB (i.e., 10-bit performance) using a few iterations of local gradient-descent optimization.