Digital Implementation of a Spiking/Bursting Neuron Model with Low Resources

This paper introduces a simplified digital neuron model that balances computational resources with biological accuracy and is designed for efficient hardware implementation. By reducing the complexity of the Izhikevich neuron model, the proposed design replicates diverse spiking behaviors while significantly reducing hardware complexity and power consumption. Implementing efficient hardware operations, the model achieves 16 of the Izhikevich behaviors. Field-Programmable Gate Array (FPGA) implementations demonstrate a 61% to 94% reduction in resource usage compared to previous implementations, with a 55% increase in operating frequency, making the model ideal for large-scale neuromorphic systems. Furthermore, it can emulate the LIF model with negligible additional resource requirements.