A High Performance and Efficient Method for Enhancing Randomness in Linear Feedback Shift Registers(LFSR)

This paper presents an efficient Pseudo Random Number Generator (PRNG) design based on a 16-bit Linear Feedback Shift Register (LFSR) with 16 polynomials dynamically controlled by four distinct ring oscillators (ROs). RNGs are the fundamental components of modern digital communications systems. The deterministic properties of PRNGs are used for symmetric key encryption for bulk data transmission and other diverse applications. This work focuses on enhancing the randomness of LFSR-based RNGs to improve security and resource utilization. The proposed method achieves high randomness through dynamic polynomial (taps) selection, providing unpredictability in both sample size and selection. The whole design is synthesized and validated in the Xilinx Vivado 2023.2 tool using a Spartan-7 FPGA board. The randomness quality of the generated bitstream is evaluated using the NIST SP800-22 statistical test suite, with the proposed RNG passing all 16 tests and producing significant P-values. Then, P-values from the NIST tests are compared with the state-of-the-art PRNG methods. In addition, the design performs considerably better with respect to randomness and resource usage than traditional 64-bit Fibonacci LFSR, which did not pass all the NIST tests. The design is also synthesized in the Synopsis design compiler for 14nm, 32nm, and 45nm technology nodes to better understand resource usage. In addition, autocorrelation results are also presented to further validate the quality of generated random numbers. This work provides an efficient, lightweight LFSR-based PRNG architecture for IoT, automation, embedded systems, and symmetric key encryption applications, where high-quality random bits are critical.