A Low Phase Noise Dual Core Colpitts Push-Push type VCO at 78 GHz in 90 nm SiGe BiCMOS Technology
Two Colpitts VCOs with a push-push architecture are implemented in 90 nm SiGe BiCMOS technology. A dual-core version of the Colpitts VCO has been implemented to improve the phase noise performance which is required for high-performance radar applications. A standard single-core Colpitts VCO version has also been implemented for comparison purposes. The dual-core version achieved a measured frequency tuning range from 74.4 GHz to 80.2 GHz and the measured best phase noise is -105.2 dBc/Hz at 1MHz offset frequency at 25°C marking one of the best-recorded phase noise values within this frequency range according to the authors' best knowledge. The VCO test chip draws a current of 101 mA, while the VCO core consumes 23.5 mA with a single supply voltage of 3.3V. The measured best phase noise of the implemented standard single core Colpitts VCO is -102.3 dBc/Hz at 1MHz offset frequency at 25°C, with almost similar frequency tuning range. An approximately 3 dB improvement in the measured phase noise from the single-core version ensures the proper implementation of the dual-core architecture.
Authors
- Shuvadip Ghosh (ORCID: https://orcid.org/0000-0001-6790-845X)
- Nils Pohl (ORCID: https://orcid.org/0000-0001-5362-638X)
- Hao Li (ORCID: https://orcid.org/0000-0003-4422-1086)
Institutions
- Infineon Technologies (Germany) (DE)
- Ruhr University Bochum (DE)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11044029
- Primary Topic
- Radio Frequency Integrated Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00