MTJ based temperature compensated beta multiplier Voltage Reference
This article mainly explores the interaction between CMOS devices and Magnetic Tunnel Junction (MTJ) devices in terms of temperature characteristics, aiming to achieve a CMOS beta multiplier circuit that combines low power consumption and wide temperature adaptability, making it a stable reference voltage source. The proposed design utilizes the Tunneling Magneto Resistance (TMR) effect of MTJ to compensate for the performance mismatch caused by temperature changes in CMOS. This design adopts TSMC 28nm CMOS craft, which can generate a reference voltage with a linearity of 0.57%/V, a temperature coefficient of 43.6ppm/°C, and a stable voltage of 441.6mV at a minimum supply voltage of 0.6V and a temperature range of 10~110 °C. The noise of this voltage at a frequency of 10Hz is 69.7uV/sqrt (Hz), the power suppression ratio is -62.1dB, and the power consumption is 4.092nW.
Authors
- Yingxue Sun (ORCID: https://orcid.org/0000-0002-9971-6644)
- Xiulong Wu (ORCID: https://orcid.org/0000-0002-5012-2570)
- W.W. Tan (ORCID: https://orcid.org/0009-0006-6755-5387)
- Zhiting Lin (ORCID: https://orcid.org/0000-0002-3314-1606)
- Chunyu Peng (ORCID: https://orcid.org/0000-0003-2408-5048)
- Yongliang Zhou (ORCID: https://orcid.org/0000-0002-7327-6759)
- Chengxing Dai
- Xin Li (ORCID: https://orcid.org/0000-0002-0144-9489)
- Zhigang Li (ORCID: https://orcid.org/0000-0002-4679-4622)
- Jingxue Zhong (ORCID: https://orcid.org/0009-0006-4550-8774)
Institutions
- Anhui University (CN)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043640
- Citations
- 1
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.67
Funders
- National Natural Science Foundation of China
- Research and Development