ZergPPU: an evolutionary multi-mode post processor for vision neural networks

With the widespread adoption of AI in various industries, there is increasing demand for edge devices to efficiently utilize AI, particularly in object detection and related applications. Current studies aim to accelerate specific computations but struggle to keep up with rapid advancements in neural network optimization techniques like quantization and pruning. So the goal of this work is to propose a microarchitecture approach that can flexibly support multiple generations of visual neural networks and dynamic data shapes.This work presents the Zerg Post Processing Unit (ZergPPU), which determines its computational architecture based on data information, partitioning into regions for efficient processing. With software support, ZergPPU adapts to evolving AI algorithms through multi-mode processing (e.g., from YOLOv3 to YOLOv9). By incorporating a path prediction unit and dynamic address generation, it supports a wide range of neural networks and optimizations. To minimize area, ZergPPU uses selective reuse executors with automatic software optimizations, resulting in an area of 0.064mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. Experiments show that this design achieves 49.3% lower computational latency compared to the baseline, making it well-suited for edge AI vision applications.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11042931
Primary Topic
Neural Networks and Applications
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article
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article

ZergPPU: an evolutionary multi-mode post processor for vision neural networks

Weilun Wang, Zheng Wang, Chao Chen
Neural Networks and Applications
article

ZergPPU: an evolutionary multi-mode post processor for vision neural networks

Weilun Wang, Zheng Wang, Chao Chen
article en

Abstract

With the widespread adoption of AI in various industries, there is increasing demand for edge devices to efficiently utilize AI, particularly in object detection and related applications. Current studies aim to accelerate specific computations but struggle to keep up with rapid advancements in neural network optimization techniques like quantization and pruning. So the goal of this work is to propose a microarchitecture approach that can flexibly support multiple generations of visual neural networks and dynamic data shapes.This work presents the Zerg Post Processing Unit (ZergPPU), which determines its computational architecture based on data information, partitioning into regions for efficient processing. With software support, ZergPPU adapts to evolving AI algorithms through multi-mode processing (e.g., from YOLOv3 to YOLOv9). By incorporating a path prediction unit and dynamic address generation, it supports a wide range of neural networks and optimizations. To minimize area, ZergPPU uses selective reuse executors with automatic software optimizations, resulting in an area of 0.064mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. Experiments show that this design achieves 49.3% lower computational latency compared to the baseline, making it well-suited for edge AI vision applications.

Shenzhen Institutes of Advanced Technology (CN)
Openalex Percentile: Top 93%
Neural Networks and Applications
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ZergPPU: an evolutionary multi-mode post processor for vision neural networks — Weilun Wang, Zheng Wang, et al. · (2025) | TGRS Research Map | TGRS