LogSimViT: Logarithmic Similar Pattern Skipping for Hardware Acceleration of ViT
Vision Transformer (ViT) has emerged as a key neural network architecture in computer vision, but its substantial computation and power overheads pose significant challenges, particularly in resource-constrained environments. To address these limitations, we propose Log-similar Pattern Skipping (LPS) algorithm and its accelerator architecture. LPS exploits the redundancy in logarithmically quantized weights to regularly bypass half of FC operations, which accounts for 54% of the total latency of DeiT-Tiny, Small, and Base models on average. Our method and its hardware efficiently accelerate ViT models, achieving a speedup of 1.71× compared to an edge GPU, and 1.70× speedup and 1.33× higher energy efficiency compared to state-of-the-art ViT accelerators, with minimal accuracy loss.
Authors
- Hyuk‐Jae Lee (ORCID: https://orcid.org/0000-0001-6811-9647)
- Dongsuk Jeon (ORCID: https://orcid.org/0000-0002-0395-8076)
- Jeong Seong-Ho (ORCID: https://orcid.org/0000-0003-4301-304X)
- Kihwan Kim (ORCID: https://orcid.org/0000-0003-0257-1707)
- I. T. Jeong (ORCID: https://orcid.org/0009-0008-7927-4069)
Institutions
- Seoul National University (KR)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043437
- Primary Topic
- Embedded Systems Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00