Design and optimization of integrated switching regulators using pre-computed lookup tables

The design of integrated switching regulators is a complex task and many degrees of freedom have to be considered compared to a traditional discrete Switched Mode Power Supplies (SMPS), where the power devices are usually off the shelf components. Design of such regulators allows for a more tailored power stage sizing, aiming to optimize the tradeoff between area and efficiency for a given application. On the other hand, the usage of low voltage devices to increase the overall converter efficiency brings some challenges in terms of reliability. Understanding the limits of certain technology within a certain application (with given constraints) is not a straightforward task.This paper presents a novel design methodology based on pre-computed Lookup Tables (LUTs), used to extract devices parameters and characteristics with SPICE-like accuracy. These parameters are then plugged into analytical equations in order to calculate the converter’s performance. A genetic algorithm is then used in order to efficiently explore the design space and find the Pareto-Optimum for a given set of objectives. The methodology is applied to the design of a simple half-bridge integrated buck converter in a 28nm CMOS technology. The power stage and the last gate driver stage are part of the optimization. Simulation results highlight the effectiveness of the proposed design methodology