An NMOS-sided biased rectifier with enhanced dynamic range for neural stimulators

Intra-Body power transfer (IBPT) holds significant potential for powering neural stimulators due to its flexible transmitter placement and extended transmission range. However, the fluctuating transmission channel, varying stimulus demands, and implantation applications pose challenges for the rectifier chip to expand its dynamic range (DR) at high power conversion efficiency (PCE). This paper proposes an NMOS-sided biased rectifier with feedback transistors to clamp the gate voltage at high input power. By properly balancing the forward conduction and reverse leakage current, DR is significantly extended. The chip is fabricated in the 0.18 μm CMOS technology, occupying an area of 444 μm × 403 μm. The post-simulation results confirm that with the frequency and load fixed at 10 MHz and 2 kΩ respectively, the NMOS-sided biased rectifier achieves a DR of 7.5 dB with PCE> 80%.

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Publication Details

Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043752
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
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An NMOS-sided biased rectifier with enhanced dynamic range for neural stimulators

Cheng Han, Jingna Mao, Guangxin Ding, Zhiwei Zhang et al.
Advanced Memory and Neural Computing
article

An NMOS-sided biased rectifier with enhanced dynamic range for neural stimulators

Cheng Han, Jingna Mao, Guangxin Ding, Zhiwei Zhang, Chuer Lin, Shan Yu
article en

Abstract

Intra-Body power transfer (IBPT) holds significant potential for powering neural stimulators due to its flexible transmitter placement and extended transmission range. However, the fluctuating transmission channel, varying stimulus demands, and implantation applications pose challenges for the rectifier chip to expand its dynamic range (DR) at high power conversion efficiency (PCE). This paper proposes an NMOS-sided biased rectifier with feedback transistors to clamp the gate voltage at high input power. By properly balancing the forward conduction and reverse leakage current, DR is significantly extended. The chip is fabricated in the 0.18 μm CMOS technology, occupying an area of 444 μm × 403 μm. The post-simulation results confirm that with the frequency and load fixed at 10 MHz and 2 kΩ respectively, the NMOS-sided biased rectifier achieves a DR of 7.5 dB with PCE> 80%.

Chinese Academy of Sciences (CN), Institute of Automation (CN)
Affordable and clean energy
Openalex Percentile: Top 87%
Advanced Memory and Neural Computing
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