A High In-Bnad Linearity Gain-Boosted N-path Filter with BW-Extended

This paper proposes a high in-band (IB) linearity gain-boosted N-path filter with bandwidth (BW)-extended. The proposed filter uses a gain-boosted design, where a switched postposition g<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf>-C network achieves the bandpass-bandreject (BPF-BRF) cascade response. This setup selectively enhances the gain-boosted filter's transition band and extends the filter's bandwidth. Fabricated in 130nm SOI CMOS, our proposed filter realizes a 4.0-5.5 dB gain and a 6.89-8.01 dB noise figure (NF) over a 0.1-1.1 GHz tuning range. With postposition g<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> linearity and clock boost circuit optimization, our filter at 0.5 GHz exhibits an in-band input-referred −1dB compression point (IB-ICP<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1dB</inf>) of 0.21 dBm and an in-band input-referred 3rd-order intercept point (IB-IIP3) of 12.59 dBm and an out-of-band (OOB)-IIP3 of 17.28 dBm. The power consumption is 36-74 mW. The chip active area is 0.9 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>.