Performance of Ring Oscillators for Cryogenic Electronics Integration from 4 to 200 K

In this paper, we present the characterisation of ring oscillator (RO) test circuits fabricated in GlobalFoundries’ (GF) 22nm fully depleted silicon-on-insulator (FD-SOI) process and operating from 200 K down to 4 K. We investigate ROs using NAND, NOR, and inverter standard cell libraries, including low, regular, and high threshold-voltage versions. Alongside temperature variations, we also consider a change in the power supply of ±5% from a nominal 0.8 V. The ROs demonstrate the combined effect of increased mobility, increased threshold voltage, and leakage current processes at cryogenic temperatures on their operation. By averaging over 81 fabricated ROs using three different delay gates and 2 different flavours, we report a statistical characterisation of their properties in the FD-SOI technology over temperature and supply voltage.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11044310
Primary Topic
Advanced Frequency and Time Standards
Type
article
Field-Weighted Citation Impact
0.00

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article

Performance of Ring Oscillators for Cryogenic Electronics Integration from 4 to 200 K

Elena Blokhina, Dennis Andrade‐Miceli, Robert Bogdan Staszewski, Dirk Leipold et al.
Advanced Frequency and Time Standards
article

Performance of Ring Oscillators for Cryogenic Electronics Integration from 4 to 200 K

Elena Blokhina, Dennis Andrade‐Miceli, Robert Bogdan Staszewski, Dirk Leipold, Mike Asker, Conor Power, Imran Bashir
article en

Abstract

In this paper, we present the characterisation of ring oscillator (RO) test circuits fabricated in GlobalFoundries’ (GF) 22nm fully depleted silicon-on-insulator (FD-SOI) process and operating from 200 K down to 4 K. We investigate ROs using NAND, NOR, and inverter standard cell libraries, including low, regular, and high threshold-voltage versions. Alongside temperature variations, we also consider a change in the power supply of ±5% from a nominal 0.8 V. The ROs demonstrate the combined effect of increased mobility, increased threshold voltage, and leakage current processes at cryogenic temperatures on their operation. By averaging over 81 fabricated ROs using three different delay gates and 2 different flavours, we report a statistical characterisation of their properties in the FD-SOI technology over temperature and supply voltage.

University College Dublin (IE)
Science Foundation Ireland
Affordable and clean energy
Openalex Percentile: Top 89%
Advanced Frequency and Time Standards
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