Cryogenic Circuit Performance Prediction Using Design-Oriented Model (SEKV) On 22nm FDSOI

This paper demonstrates the design process and performance prediction of a cryogenic 22 nm FDSOI circuit using a design-oriented model. The simplified EKV model is adopted to capture IV characteristics of short-channel transistors, for which parameters are extracted from cryogenic measurement of commercial FDSOI MOSFETs. When applied to a complete circuit, the model accurately predicts performances at various back-gate voltages and temperatures, achieving less than 1 % average absolute error. This validates the presented analytical approach, even under the stringent requirements of low-temperature operation, paving the way to exploiting rather than enduring cryogenic temperature effects on CMOS designs.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043615
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
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article

Cryogenic Circuit Performance Prediction Using Design-Oriented Model (SEKV) On 22nm FDSOI

Baptiste Jadot, Brian Martinez, Edoardo Charbon, F. E. Bergamaschi et al.
Radio Frequency Integrated Circuit Design
article

Cryogenic Circuit Performance Prediction Using Design-Oriented Model (SEKV) On 22nm FDSOI

Baptiste Jadot, Brian Martinez, Edoardo Charbon, F. E. Bergamaschi, Franck Badets, Quentin Schmidt, M. Cassé, Yvain Thonnart, Christian Enz, Hung-Chi Han, X. Jehl, Antoine Faurie
article en

Abstract

This paper demonstrates the design process and performance prediction of a cryogenic 22 nm FDSOI circuit using a design-oriented model. The simplified EKV model is adopted to capture IV characteristics of short-channel transistors, for which parameters are extracted from cryogenic measurement of commercial FDSOI MOSFETs. When applied to a complete circuit, the model accurately predicts performances at various back-gate voltages and temperatures, achieving less than 1 % average absolute error. This validates the presented analytical approach, even under the stringent requirements of low-temperature operation, paving the way to exploiting rather than enduring cryogenic temperature effects on CMOS designs.

Commissariat à l'Énergie Atomique et aux Énergies Alternatives (FR), CEA Grenoble (FR), Laboratoire d'Électronique des Technologies de l'Information (FR), École Polytechnique Fédérale de Lausanne (CH), Université Grenoble Alpes (FR)
Affordable and clean energy
Openalex Percentile: Top 87%
Radio Frequency Integrated Circuit Design
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Cryogenic Circuit Performance Prediction Using Design-Oriented Model (SEKV) On 22nm FDSOI — Baptiste Jadot, Brian Martinez, et al. · (2025) | TGRS Research Map | TGRS