Non-Volatile Content-Addressable Memory For Energy-Efficient & High-Performance Search And Update Operations
This work presents a non-volatile content-addressable memory (NV-CAM) based on double-barrier magnetic tunnel junction technology (DMTJ). Unlike state-of-the-art NV-CAM designs that present low-performance updates, our NV-CAM allows energy-efficient, high-performance search and update operations. This makes it well-suited for applications requiring a high frequency of searches/updates, such as associative processors. The NV-CAM hybrid CMOS/DMTJ was designed using a commercial 65nm CMOS technology and a Verilog-A-based DMTJ compact model. The NV-CAM evaluation was carried out by employing Monte Carlo simulations while accounting for process variations. Simulation results show that our NV-CAM presents competitive figures of merit compared to state-of-the-art design. Our NV-CAM presents energy-efficient operations and reduces the update and search delay by about 71% and 75%, respectively, compared to other NV-CAMs.
Authors
- Ramiro Taco (ORCID: https://orcid.org/0000-0003-3046-2364)
- Marco Lanuzza (ORCID: https://orcid.org/0000-0002-6480-9218)
- Luis Miguel Prócel (ORCID: https://orcid.org/0000-0001-6189-5184)
- Alessandro Bedoya
- Benjamin Zambrano (ORCID: https://orcid.org/0000-0002-1301-3447)
- Esteban Garzón (ORCID: https://orcid.org/0000-0002-5862-2246)
Institutions
- University of Calabria (IT)
- Universidad San Francisco de Quito (EC)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11044106
- Primary Topic
- Network Packet Processing and Optimization
- Type
- article
- Field-Weighted Citation Impact
- 0.00