LTPS-TFT-Based In-Sensor Compression with Spatiotemporal Differencing Optimization

With the development of the Internet of Things (IoT), in-sensor computing techniques, such as the frame differencing and edge detection, is an effective solution for reducing large-scale sensing data transmission activities and related costs by eliminating the spatiotemporal redundancy. In these in-sensor computing tasks, thin-film transistor (TFT) technologies have gained particular interest because of their inherent support for large-area sensing-computing integration. However, existing TFT-based in-sensor computing works face challenges of high device variations, high-cost analog readouts and insufficient optimization of sequential redundancy. To address these challenges, we propose a robust spatiotemporal optimization-based in-sensor computing architecture, enabling low-power, low-latency, and efficient data compression. By combining frame differencing and edge detection, the data sparsity is greatly improved while the data movement is reduced. We develop a 4μm low-temperature polysilicon (LTPS) TFT digital standard cell library and implement a Rice compression encoder based on it. The system-level evaluations exhibit 21.5× compression ratio, 6.9× energy efficiency and 5.2× speedup improvement compared with traditional compression schemes in large-area scenarios.