SSRNet: Few-shot IC Segmentation in Automated PCB Image Processing
Automated inspection of Integrated Circuits (ICs) on Printed Circuit Boards (PCBs) is essential for ensuring the reliability of modern electronic systems. However, the inspection process faces significant challenges, particularly data scarcity and low inter-class variance. To address these challenges, we propose SSRNet, a few-shot learning-based framework for precise IC segmentation in complex PCB optical images. Unlike traditional deep learning models, our proposed SSRNet utilizes a similarity-guided approach for initial mask prediction and integrates a region classifier for further refinement. This design allows SSRNet to accurately segment IC components, even with limited annotated data. Experimental results demonstrate that our proposed SSRNet outperforms the state-of-the-art model, achieving a 23.0% increase in IoU and a 13.2% improvement in the Dice coefficient on NTU PCB DSX Dataset (NPDD).
Authors
- Bah‐Hwee Gwee (ORCID: https://orcid.org/0000-0002-3222-2885)
- Feng Ji (ORCID: https://orcid.org/0000-0003-3442-1471)
- Xinrui Wang (ORCID: https://orcid.org/0000-0001-6907-5471)
- Deruo Cheng (ORCID: https://orcid.org/0000-0003-2497-9340)
- Yiqiong Shi (ORCID: https://orcid.org/0000-0002-9821-1783)
- Yuhang Wang (ORCID: https://orcid.org/0000-0001-5181-0271)
- Tong Lin (ORCID: https://orcid.org/0000-0002-8112-0439)
Institutions
- Nanyang Technological University (SG)
Publication Details
- Published
- 2025-05-25
- DOI
- https://doi.org/10.1109/iscas56072.2025.11043275
- Primary Topic
- Integrated Circuits and Semiconductor Failure Analysis
- Type
- article
- Field-Weighted Citation Impact
- 0.00