Analysis of Non-Idealities in CMOS RX Front-End for Linear Phased Arrays

This paper analyses the phase performance of a RX front-end architecture implemented in a 65-nm CMOS process for linear phased arrays at 24 GHz. The front-end is based on an array of LNAs and phase shifters, which can be used in analog and hybrid beamformers. The penalties of the radiation pattern are associated with metrics calculated from the phase performance. PVT variations and mismatch have been included. Results show that the front-end could potentially attain, in spite of PVT variations, a value near the defined by the mismatch.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11044094
Citations
1
Primary Topic
Antenna Design and Optimization
Type
article
Field-Weighted Citation Impact
4.99
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article

Analysis of Non-Idealities in CMOS RX Front-End for Linear Phased Arrays

Francisco Aznar, Antonio D. Martínez-Pérez, S. Celma, Carlos Sánchez‐Azqueta et al.
1 citations
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article

Analysis of Non-Idealities in CMOS RX Front-End for Linear Phased Arrays

Francisco Aznar, Antonio D. Martínez-Pérez, S. Celma, Carlos Sánchez‐Azqueta, Uxua Esteban-Eraso
article en
1 citations

Abstract

This paper analyses the phase performance of a RX front-end architecture implemented in a 65-nm CMOS process for linear phased arrays at 24 GHz. The front-end is based on an array of LNAs and phase shifters, which can be used in analog and hybrid beamformers. The penalties of the radiation pattern are associated with metrics calculated from the phase performance. PVT variations and mismatch have been included. Results show that the front-end could potentially attain, in spite of PVT variations, a value near the defined by the mismatch.

Universidad de Zaragoza (ES), Centro Universitario de la Defensa en San Javier (ES)
Openalex Percentile: Top 6%
Antenna Design and Optimization
4.99
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