An On-chip Sensor Placement Strategy For Mitigation Framework Against Voltage-Drop Attack

Multi-tenant Field Programmable Gate Arrays (FP-GAs) have been widely integrated into cloud and edge computing environments to save hardware costs. Unfortunately, shared FPGAs among multiple users make the system vulnerable to new security threats. For instance, a voltage-drop attack exploits transient voltage fluctuations on the FPGA power distribution network to cause critical faults. Existing works either check combinatorial loops or utilize numerous on-chip sensors to detect fault attacks. Recent literature shows that some advanced power waster units can bypass combinatorial loop checks and defeat attack localization. To counteract the powerful fault attacks, this work proposes an on-chip sensor placement strategy to detect and localize the source of voltage-drop attacks. An attack mitigation framework integrates the proposed sensor placement strategy and a new assessment metric to improve the sensitivity of attack localization. Our case study shows that the proposed method achieves a 100% success rate in attack localization. Furthermore, experimental results show that the proposed method reduces the localization time by 90% and the number of deployed sensors by 89% over existing works.