A 64-channel Time-multiplexed Neural Recording IC with Dual Positive Feedback Loop Z_IN-Boosting

This paper presents a time-multiplexed neural recording readout IC (ROIC) for interfacing a high-density microelectrode array (MEA) with integrated switches. Time-domain multiplexing (TDM) allows multiple electrodes to share an analog front-end (AFE) and ADC to save chip area. The design features an input impedance (Z<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IN</inf>) boosting technique using dual positive feedback loops (DPFLs) to cancel internal and external parasitic capacitances across multiple channels using shared DPFL capacitors. Thus, the effective area and number of capacitors to be trimmed for the DPFL technique are also reduced by the multiplexing ratio. The system is implemented in a 180nm CMOS process and uses a chopped capacitively coupled instrumentation amplifier (CCIA) for a fixed gain and low noise, followed by a windowed integration sampling amplifier to reduce the system’s noise equivalent bandwidth and provide programmable gain. The neural recording ROIC occupies an active area of 0.124mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>/ch and consumes 8.81μW/ch. The sampling rate is 20kHz/ch with a simulated input-referred noise of 5.95μVrms from 1Hz to 10kHz. The DPFL capacitors are fully shared across channels and help boost Z<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IN</inf> to 840MΩ, demonstrating the effectiveness and suitability of the DPFL Z<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IN</inf>-boosting technique for TDM chopped CCIA AFEs.