Energy Efficient Voltage-Mode Simultaneous Bidirectional Transceiver for Serial Links

This paper presents a single-ended voltage-mode (VM) simultaneous bidirectional (SBD) transceiver for chip-to-chip interconnects. A hybrid network in the receive path cancels the transmitted signal to extract the received signal enabling SBD signaling. The conventional source-series terminated (SST) and trans-impedance amplifier (TIA)-based transmitters used in the SBD signaling transceivers consume high power to minimize output impedance variation. The proposed design minimize this variation with low power consumption, thereby leading to a low-power transceiver. In addition, the power consumption while incorporating feed-forward equalizer (FFE) is reduced by using current-mode implementation in the proposed transceiver. Implemented using TSMC PDK in 65 nm technology, the simulation results gives an energy efficiency of 0.35 pJ/b at 20 Gb/s SBD data-rate.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043871
Primary Topic
Interconnection Networks and Systems
Type
article
Field-Weighted Citation Impact
0.00

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article

Energy Efficient Voltage-Mode Simultaneous Bidirectional Transceiver for Serial Links

Nijwm Wary, Bibhu Datta Sahoo, Ankit Yadav, V. K. Surya et al.
Interconnection Networks and Systems
article

Energy Efficient Voltage-Mode Simultaneous Bidirectional Transceiver for Serial Links

Nijwm Wary, Bibhu Datta Sahoo, Ankit Yadav, V. K. Surya, Sree Kumar R. G.
article en

Abstract

This paper presents a single-ended voltage-mode (VM) simultaneous bidirectional (SBD) transceiver for chip-to-chip interconnects. A hybrid network in the receive path cancels the transmitted signal to extract the received signal enabling SBD signaling. The conventional source-series terminated (SST) and trans-impedance amplifier (TIA)-based transmitters used in the SBD signaling transceivers consume high power to minimize output impedance variation. The proposed design minimize this variation with low power consumption, thereby leading to a low-power transceiver. In addition, the power consumption while incorporating feed-forward equalizer (FFE) is reduced by using current-mode implementation in the proposed transceiver. Implemented using TSMC PDK in 65 nm technology, the simulation results gives an energy efficiency of 0.35 pJ/b at 20 Gb/s SBD data-rate.

University at Buffalo, State University of New York (US), Indian Institute of Technology Bhubaneswar (IN)
Synopsys
Affordable and clean energy
Openalex Percentile: Top 84%
Interconnection Networks and Systems
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Energy Efficient Voltage-Mode Simultaneous Bidirectional Transceiver for Serial Links — Nijwm Wary, Bibhu Datta Sahoo, et al. · (2025) | TGRS Research Map | TGRS