A 240-mV 33.8-μV/°C 1.5-nW Voltage Detector for Energy Harvesting

This paper presents an ultra-low-voltage (ULV) and ultra-low-power (ULP) voltage detector (VD) for energy harvesting systems (EHS). The VD is designed using a 2-transistor (2T) voltage detection circuit and a 2T bias circuit. By leveraging two types of transistors with small threshold voltage differences, the detection voltage is reduced to 240 mV, enhancing the feasibility and practicality of the design for ULV EHS. The detection voltage can be programmed by incorporating an appropriate voltage divider into the VD, while the proposed 2T bias technique reduces its variation across different process corners. The design is implemented in a 65 nm CMOS process and occupies a chip area of 260 µm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. Post-layout simulation results indicate that the VD achieves a detection voltage of 240 mV, with a standard deviation (σ) of 6.6 mV, drawing only 5 nA of current at a supply voltage of 0.3 V. The average temperature coefficient (TC) across five process corners is 33.8 µV/°C, simulated within a temperature range of -40 °C to 125 °C.

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Publication Details

Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043240
Citations
1
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
0.73

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article

A 240-mV 33.8-μV/°C 1.5-nW Voltage Detector for Energy Harvesting

Wenjun Gong, Shi Chen, Binbin Chen, Liangjian Lyu
1 citations
Advanced Memory and Neural Computing
0.73
article

A 240-mV 33.8-μV/°C 1.5-nW Voltage Detector for Energy Harvesting

Wenjun Gong, Shi Chen, Binbin Chen, Liangjian Lyu
article en
1 citations

Abstract

This paper presents an ultra-low-voltage (ULV) and ultra-low-power (ULP) voltage detector (VD) for energy harvesting systems (EHS). The VD is designed using a 2-transistor (2T) voltage detection circuit and a 2T bias circuit. By leveraging two types of transistors with small threshold voltage differences, the detection voltage is reduced to 240 mV, enhancing the feasibility and practicality of the design for ULV EHS. The detection voltage can be programmed by incorporating an appropriate voltage divider into the VD, while the proposed 2T bias technique reduces its variation across different process corners. The design is implemented in a 65 nm CMOS process and occupies a chip area of 260 µm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. Post-layout simulation results indicate that the VD achieves a detection voltage of 240 mV, with a standard deviation (σ) of 6.6 mV, drawing only 5 nA of current at a supply voltage of 0.3 V. The average temperature coefficient (TC) across five process corners is 33.8 µV/°C, simulated within a temperature range of -40 °C to 125 °C.

University of Washington (US), Fudan University (CN), Shanghai Fudan Microelectronics (China) (CN), East China Normal University (CN)
National Natural Science Foundation of China
Affordable and clean energy
Openalex Percentile: Top 27%
Advanced Memory and Neural Computing
0.73
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