A Low-Noise High-Precision Dual-Mode Offset Calibration for High-Speed Dynamic Comparators

This paper presents a dual-mode offset calibration for high-speed dynamic comparators, offering a wide calibration range, low offset, low input-referred noise, and reduced comparison delay. A wide calibration range is achieved in Mode 1 by using a switched-capacitor-biased auxiliary differential current path, while a low-noise, high-precision calibration with reduced comparison delay is provided by Mode 2 using digitally adjustable cross-coupled capacitors which enhance the transconductance of the differential pairs in the pre-amplifier. Designed in a 28-nm CMOS process, simulation results show that at an operating frequency of 4 GHz, the tuning range is from -31.5 to 35.4 mV, with the standard deviation of comparator offset reduced from 8.06 mV to 136 μV. When the two modes are configured to operate synergistically, the input-referred noise is 269 μV with a comparison delay of less than 19.3 ps. Furthermore, the additional power consumption due to the calibration circuits is less than 12%.