An All-Digital Time-Domain Compute-in-Memory Engine for Convolutional Neural Networks in 22nm

This paper presents a standard cell (SC) based time-domain compute-in-memory (TDCIM) macro for convolutional neural networks (CNNs), supporting 4b×4b multiplication. A basic cell is proposed to enable bitwise multiplication with 1-bit weights and 2-bit activations, along with double-edge computing. An 8-stage successive approximation register time-to-digital converter (SAR-TDC) is employed to convert time-domain signals into the digital domain. We leverage the inherent features of the network to enhance throughput and have fabricated the TDCIM macro in a 22nm technology. We present the measured delay and variation of the basic cell, the integral nonlinearity (INL) of the TDC, and the total computation error. The proposed macro achieves an energy efficiency of 98.44 TOPS/W at 0.55V for 4b-input and 4b-weight MAC computations.

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Published
2025-05-25
DOI
https://doi.org/10.1109/iscas56072.2025.11043778
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
0.00

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article

An All-Digital Time-Domain Compute-in-Memory Engine for Convolutional Neural Networks in 22nm

Tobias Gemmeke, Christian Lanius, Florian Freye, Jie Lou
Advanced Memory and Neural Computing
article

An All-Digital Time-Domain Compute-in-Memory Engine for Convolutional Neural Networks in 22nm

Tobias Gemmeke, Christian Lanius, Florian Freye, Jie Lou
article en

Abstract

This paper presents a standard cell (SC) based time-domain compute-in-memory (TDCIM) macro for convolutional neural networks (CNNs), supporting 4b×4b multiplication. A basic cell is proposed to enable bitwise multiplication with 1-bit weights and 2-bit activations, along with double-edge computing. An 8-stage successive approximation register time-to-digital converter (SAR-TDC) is employed to convert time-domain signals into the digital domain. We leverage the inherent features of the network to enhance throughput and have fabricated the TDCIM macro in a 22nm technology. We present the measured delay and variation of the basic cell, the integral nonlinearity (INL) of the TDC, and the total computation error. The proposed macro achieves an energy efficiency of 98.44 TOPS/W at 0.55V for 4b-input and 4b-weight MAC computations.

RWTH Aachen University (DE)
Ministry of Education
Affordable and clean energy
Openalex Percentile: Top 87%
Advanced Memory and Neural Computing
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An All-Digital Time-Domain Compute-in-Memory Engine for Convolutional Neural Networks in 22nm — Tobias Gemmeke, Christian Lanius, et al. · (2025) | TGRS Research Map | TGRS