Smart Watchdog Mechanism for Fault Detection in RISC-V

Modern micro-processors face reliability challenges due to manufacturing defects, aging or when operating in harsh environments like deep-sea or space. Watchdog mechanisms are essential for detecting both permanent and transient faults, but they must exhibit minimal overheads in terms of power and area consumption. Nonetheless, additional research is required to ensure the dependability of the watchdog circuit as if compromised, could pose a significant threat to the system. This paper proposes a smart watchdog paradigm based on spiking neural networks (SNNs) that could realise a reliable, low power and area efficient solution. The smart watchdog presented in this paper was trained to monitor control flow at the execute stage of a RISC-V processor with results showing high fault coverage of 98%, independent of the software application executed. The smart watchdog was able to detect faults not recognised by the trap handler of the RISC-V core. An FPGA implementation of the smart watchdog validates the in-circuit fault detection capability when deployed with a RISC-V processor.