A 40-nm 6.75 TOPS/W Quantization-Aware NN Processor for High-Energy-Efficiency Image Recognition

This paper presents the first VGG-like dedicated neural network (NN) processor designed to support the complete quantization-aware scheme for computer vision acceleration, including input normalization, reparameterization, and convolutional neural networks. The design utilizes a float-to-fixed point transformation scheme and architectural explorations, such as folding and data interleaving. To enhance the throughput, the processor features 9 CNN engines with 1,296 INT8 MACs for compute-intensive operations. A reparameter circuit merges multiple kernels into one, significantly reducing computational complexity. The chip is designed using TSMC 40 nm technology and occupies a core area of 1.14 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. Operating at a clock of 200 MHz and consuming 38.4 mW, the chip achieves a 59.6 FPS for real-time image recognition applications. Compared to state-of-the-art designs, it achieves 9.5-to-475.4× and 137.6-to-712.9× improvements in area and energy efficiency, respectively. This work offers substantial benefits for real-time image recognition, providing both high throughput and low power consumption.