An advanced scheme to match electric field between program verify and read operation in 3D NAND flash memory

Abstract In this paper, we propose an advanced scheme to improve reliability characteristics of the 3D NAND flash memory by controlling the bias of the adjacent word line (WL). The pattern of neighboring cell can differ between program verify and read operations. The read operation proceeds through all written patterns, while the program operation proceeds sequentially from one side to the other. To compensate for the different electric field affected from the pattern of neighboring cell, we propose to increase the pass voltage ( V PASS ) of the adjacent WL cell in read operation, while lowering V PASS in program verify operation. We analyze physical phenomenon and validate the effect of our proposed scheme by using technology computer-aided design simulations and experimental measurements.