Resistorless Grounded Memristor Emulator Using OTA-OTRA for low power edge computing

This paper presents a novel charge-controlled, resistorless memristor emulator configuration based on current-mode building blocks, specifically an Operational Transconductance Amplifier (OTA), an Operational Transresistance Amplifier (OTRA), and a grounded MOS capacitor. The proposed design focuses exclusively on grounded incremental and decremental memristor configurations. It eliminates the need for resistors, analog multipliers, or ADC/DAC components, simplifying the architecture and enhancing its integration potential. The emulator's memristance is electronically tunable through the bias voltage of the OTRA and is accurately modeled as a function of the input signal flux. Simulation results, using Cadence Virtuoso with 0.18 µm CMOS technology, confirm stable pinched hysteresis behavior up to 20 MHz. The design exhibits robust performance under various conditions, including temperature variations, process corners, and a range of capacitor values. The proposed configuration demonstrates low power consumption, measured at just 1.019 mW. Its non-volatile characteristics are validated through pulsed signal testing, confirming its suitability for memory-retaining applications. Also, experimental verification using commercially available ICs supports the simulation outcomes. This grounded memristor emulator offers a practical, energy-efficient, and scalable solution for integration into analog and neuromorphic systems.

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Publication Details

Published
2025-06-27
DOI
https://doi.org/10.1145/3716368.3735265
Primary Topic
Advanced Memory and Neural Computing
Type
article
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article

Resistorless Grounded Memristor Emulator Using OTA-OTRA for low power edge computing

Prabha Sundaravadivel, Shekhar Suman Borah, Krishna N. Reddy
Advanced Memory and Neural Computing
article

Resistorless Grounded Memristor Emulator Using OTA-OTRA for low power edge computing

Prabha Sundaravadivel, Shekhar Suman Borah, Krishna N. Reddy
article en

Abstract

This paper presents a novel charge-controlled, resistorless memristor emulator configuration based on current-mode building blocks, specifically an Operational Transconductance Amplifier (OTA), an Operational Transresistance Amplifier (OTRA), and a grounded MOS capacitor. The proposed design focuses exclusively on grounded incremental and decremental memristor configurations. It eliminates the need for resistors, analog multipliers, or ADC/DAC components, simplifying the architecture and enhancing its integration potential. The emulator's memristance is electronically tunable through the bias voltage of the OTRA and is accurately modeled as a function of the input signal flux. Simulation results, using Cadence Virtuoso with 0.18 µm CMOS technology, confirm stable pinched hysteresis behavior up to 20 MHz. The design exhibits robust performance under various conditions, including temperature variations, process corners, and a range of capacitor values. The proposed configuration demonstrates low power consumption, measured at just 1.019 mW. Its non-volatile characteristics are validated through pulsed signal testing, confirming its suitability for memory-retaining applications. Also, experimental verification using commercially available ICs supports the simulation outcomes. This grounded memristor emulator offers a practical, energy-efficient, and scalable solution for integration into analog and neuromorphic systems.

Agricultural Research Service (US), The University of Texas at Tyler (US)
Affordable and clean energy
Openalex Percentile: Top 87%
Advanced Memory and Neural Computing
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