A Memcapacitor Emulator Circuit Using a Single MO-OTA with Experimental Results and its Application in Neuromorphic and Mathematical Operations
A memcapacitor emulator model has been proposed using a single multi-output operational transconductance amplifier (MO-OTA). The model has been simulated using Cadence Virtuoso 45[Formula: see text]nm GPDK technology. The experimental verification of the model has been carried out using the existing operational transconductance IC LM13700. The circuit exhibits desired characteristics up to a frequency of 4[Formula: see text]MHz and has a power consumption of 272.5[Formula: see text] [Formula: see text]W. Using the proposed model, transient analysis and hysteresis curves have been plotted at different frequencies. The reliability of the proposed structure has been tested through Monte Carlo simulations. Process-voltage-temperature (PVT) variation testing has been performed to check the robustness of the proposed circuit. The proposed memcapacitor emulator model has been shown to have a diverse range of applications ranging from mathematical operations such as integration and differentiation to neuromorphic adaptive learning.
Authors
- Varun Saxena (ORCID: https://orcid.org/0000-0003-1732-0257)
- Mahipal Singh Choudhry (ORCID: https://orcid.org/0000-0001-9380-9121)
- Rahul Kumar Gupta (ORCID: https://orcid.org/0000-0002-9666-3081)
Institutions
- Jawaharlal Nehru University (IN)
- Jaypee Institute of Information Technology (IN)
- Delhi Technological University (IN)
Publication Details
- Journal
- Journal of Circuits Systems and Computers
- Published
- 2025-06-27
- DOI
- https://doi.org/10.1142/s0218126625503876
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.00