Design of Hybrid, High-Speed, Nonvolatile Ternary Content Addressable Memory Using CMOS and RRAM

Resistive random access memory (RRAM)-based memory technologies have gained attention due to their potential for high-density, low-power, compatibility with CMOS processes, and fast-access memory. They can be integrated into various memory architectures, including tertiary content addressable memory (TCAM). TCAMs are vital to integrated circuits designed for content-based search engines, database systems, and network routers. RRAM-based TCAM has gained significant attention as a promising technology for pattern search and large-scale pattern recognition. This work proposes the design and analyses of 20-transistor/4-RRAM (20T-4R) and 10-transistors/2-RRAM (10T-2R) nonvolatile TCAM (NV-TCAM). These designs demonstrate a significant reduction in search delay compared to existing solutions and show improvements in energy efficiency per bit. Specifically, the average energy per search (Esearch) for the 20T-4R TCAM cell is 0.280 fJ/bit/search, while the search delay for the 10T-2R TCAM cell is 0.343 fJ/bit/search. Although the search energy in the 10T-2R TCAM is lower than in the 20T-4R, the 10T-2R offers an overall advantage in terms of area efficiency. These proposed NV-TCAMs are implemented using 18 nm PDK FinFET technology, providing reduced search delay and lower average Esearch compared to previously discussed architectures.