Revolutionize 3D-Chip Design With Open3DFlow, an Open-Source AI-Enhanced Solution
The escalating demand for high-performance and energy-efficient electronics has propelled 3D integrated circuits (3D ICs) as a promising solution. However, major obstacles have been the lack of specialized electronic design automation (EDA) software and standardized design flows for 3D chiplets. To bridge the gap, we introduce Open3DFlow,<xref ref-type="fn" rid="fn1" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</xref> an open-source design platform for 3D ICs. It is a seven-step workflow that incorporates essential ASIC back-end processes while supporting multi-physics analysis, such as through silicon via (TSV) modeling, thermal analysis, and signal integrity (SI) evaluations. To illustrate all functionalities of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Open3DFlow</i>, we use it to implement a 3D RISC-V CPU design with a vertically stacked L2 cache on a separated die. We harden both CPU logic and 3D-cache die in a GlobalFoundries <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18\mu $ </tex-math></inline-formula>m (GF180) process with open-source PDK support. We enable face-to-face (F2F) coupling of the top and bottom die by constructing a bonding layer based on the original technology file. <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Open3DFlow</i>’s open-source nature allows seamless integration of custom AI optimization algorithms. As a showcase, we leverage large language models (LLMs) to help the bonding pad placement. In addition, we apply LLM on back-end Tcl script generations to improve design productivity. We expect <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Open3DFlow</i> to open up a brand-new paradigm for future 3D IC innovations.
Authors
- W.H. Chen
- Lei Ren (ORCID: https://orcid.org/0000-0001-9939-3251)
- Zhibin Luan
- Dawei Feng (ORCID: https://orcid.org/0000-0002-4732-5377)
- Yifei Zhu (ORCID: https://orcid.org/0000-0003-4352-6507)
- Zhangxi Tan
Institutions
- Tsinghua University (CN)
Publication Details
- Journal
- IEEE Open Journal of Circuits and Systems
- Published
- 2025-01-01
- DOI
- https://doi.org/10.1109/ojcas.2024.3518754
- Citations
- 1
- Primary Topic
- Manufacturing Process and Optimization
- Type
- article
- Field-Weighted Citation Impact
- 1.24