On-Chip Silicon Photonic Neural Networks Based on Thermally Tunable Microring Resonators for Recognition Tasks

Leveraging the human brain as a paradigm of energy-efficient computation, considerable attention has been paid to photonic neurons and neural networks to achieve higher computing efficiency and lower energy consumption. This study experimentally demonstrates on-chip silicon photonic neurons and neural networks based on thermally tunable microring resonators (MRRs) implement weighting and nonlinear operations. The weight component consists of eight cascaded MRRs thermally tuned within wavelength division multiplexing (WDM) architecture. The nonlinear response depends on the MRR’s nonlinear transmission spectrum, which is analogous to the rectified linear unit (ReLU) function. The matrix multiplication and recognition task of digits 2, 3, and 5 represented by seven-segment digital tube are successfully completed by using the photonic neural networks constructed by the photonic neurons based on the on-chip thermally tunable MRR as the nonlinear units. The power consumption of the nonlinear unit was about 5.65 mW, with an extinction ratio of about 25 dB between different digits. The proposed photonic neural network is CMOS-compatible, which makes it easy to construct scalable and large-scale multilayer neural networks. These findings reveal that there is great potential for highly integrated and scalable neuromorphic photonic chips.

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Publication Details

Journal
Photonics
Published
2025-06-24
DOI
https://doi.org/10.3390/photonics12070640
Primary Topic
Neural Networks and Reservoir Computing
Type
article
Field-Weighted Citation Impact
0.00

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article

On-Chip Silicon Photonic Neural Networks Based on Thermally Tunable Microring Resonators for Recognition Tasks

Chuantong Cheng, Biao Jiang, Lei Bao, Yiyang Xie et al.
Photonics
Neural Networks and Reservoir Computing
article

On-Chip Silicon Photonic Neural Networks Based on Thermally Tunable Microring Resonators for Recognition Tasks

Chuantong Cheng, Biao Jiang, Lei Bao, Yiyang Xie, Huan Zhang, Beiju Huang
article en

Abstract

Leveraging the human brain as a paradigm of energy-efficient computation, considerable attention has been paid to photonic neurons and neural networks to achieve higher computing efficiency and lower energy consumption. This study experimentally demonstrates on-chip silicon photonic neurons and neural networks based on thermally tunable microring resonators (MRRs) implement weighting and nonlinear operations. The weight component consists of eight cascaded MRRs thermally tuned within wavelength division multiplexing (WDM) architecture. The nonlinear response depends on the MRR’s nonlinear transmission spectrum, which is analogous to the rectified linear unit (ReLU) function. The matrix multiplication and recognition task of digits 2, 3, and 5 represented by seven-segment digital tube are successfully completed by using the photonic neural networks constructed by the photonic neurons based on the on-chip thermally tunable MRR as the nonlinear units. The power consumption of the nonlinear unit was about 5.65 mW, with an extinction ratio of about 25 dB between different digits. The proposed photonic neural network is CMOS-compatible, which makes it easy to construct scalable and large-scale multilayer neural networks. These findings reveal that there is great potential for highly integrated and scalable neuromorphic photonic chips.

PhotonicsVol. 12(7)
Chinese Academy of Sciences (CN), Beijing University of Technology (CN), State Key Laboratory on Integrated Optoelectronics (CN), Institute of Semiconductors (CN), University of Chinese Academy of Sciences (CN)
National Natural Science Foundation of China, Chinese Academy of Sciences, China Postdoctoral Science Foundation, Youth Innovation Promotion Association of the Chinese Academy of Sciences, Natural Science Foundation of Beijing Municipality, Beijing Postdoctoral Science Foundation, Beijing Nova Program, Youth Innovation Promotion Association
Openalex Percentile: Top 93%
Neural Networks and Reservoir Computing
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