SiGe Pocket Engineering in DG-DD-HTFET for Low-Power Devices
This paper presents two distinct architectures of Double Gate-Dual Dielectric-Heterojunction Tunnel Field-Effect Transistors (DG-DD-HTFET): one with a SiGe pocket and one without. These designs are analyzed using Silvaco TCAD. The inclusion of an n<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> pocket in the double gate-dual dielectric-SiGe pocket-heterojunction tunnel field effect transistor (DG-DD-SiGe Pocket HTFET) enhances band-to-band tunneling (BTBT), leading to a higher ON-state current (I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>), an improved current ratio (Iratio), and a lower subthreshold swing (SS) compared to the conventional DG-DD-HTFET. Additionally, the double gate-dual dielectric configuration improves carrier transport and reduces leakage. The study further examines the impact of SiGe composition in the pocket region, temperature variations, and interface trap charges on device performance. Simulation results confirm the superiority of the proposed structure, highlighting its potential for low-power, high-performance applications.
Authors
- Madhulika Verma (ORCID: https://orcid.org/0000-0003-3329-7560)
- Sachin Agrawal (ORCID: https://orcid.org/0000-0002-5338-9932)
- Ankita Singh
Institutions
- National Institute of Technology Delhi (IN)
Publication Details
- Published
- 2025-03-06
- DOI
- https://doi.org/10.1109/ispcc66872.2025.11039358
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00