Enhancing FPGA Security: An AI-Driven Approach to Root of Trust Architecture

The security of Field-Programmable Gate Arrays (FPGAs) is a growing concern due to the increasing complexity of cyber threats. Traditional Root of Trust (RoT) architectures in FPGA-based systems rely on static security mechanisms that struggle to adapt to emerging attack vectors. This paper presents an AI-driven FPGA- based RoT framework that enhances security by integrating machine learning (ML) and deep learning (DL) for real-time threat detection, adaptive security policy enforcement, and blockchain-assisted firmware verification. The proposed architecture consists of three key components: an AI-Powered Threat Detection Module (AI-TDM) for anomaly detection, an Adaptive Security Policy Engine (ASPE) for dynamic policy adjustments, and a Blockchain-Assisted Firmware Verification (BFV) mechanism to prevent unauthorized modifications. Through comparative analysis, the proposed framework demonstrates improved security robustness, reduced response time, and enhanced adaptability compared to conventional RoT approaches. By leveraging AI and blockchain technologies, this solution addresses existing security gaps in FPGA-based architectures, paving the way for resilient and intelligent hardware security systems.

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Publication Details

Published
2025-03-06
DOI
https://doi.org/10.1109/ispcc66872.2025.11039435
Primary Topic
Physical Unclonable Functions (PUFs) and Hardware Security
Type
article
Field-Weighted Citation Impact
0.00
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article

Enhancing FPGA Security: An AI-Driven Approach to Root of Trust Architecture

Isha Malhotra, Yogendra Kumar Sharma, Pratham Kaushik
Physical Unclonable Functions (PUFs) and Hardware Security
article

Enhancing FPGA Security: An AI-Driven Approach to Root of Trust Architecture

Isha Malhotra, Yogendra Kumar Sharma, Pratham Kaushik
article en

Abstract

The security of Field-Programmable Gate Arrays (FPGAs) is a growing concern due to the increasing complexity of cyber threats. Traditional Root of Trust (RoT) architectures in FPGA-based systems rely on static security mechanisms that struggle to adapt to emerging attack vectors. This paper presents an AI-driven FPGA- based RoT framework that enhances security by integrating machine learning (ML) and deep learning (DL) for real-time threat detection, adaptive security policy enforcement, and blockchain-assisted firmware verification. The proposed architecture consists of three key components: an AI-Powered Threat Detection Module (AI-TDM) for anomaly detection, an Adaptive Security Policy Engine (ASPE) for dynamic policy adjustments, and a Blockchain-Assisted Firmware Verification (BFV) mechanism to prevent unauthorized modifications. Through comparative analysis, the proposed framework demonstrates improved security robustness, reduced response time, and enhanced adaptability compared to conventional RoT approaches. By leveraging AI and blockchain technologies, this solution addresses existing security gaps in FPGA-based architectures, paving the way for resilient and intelligent hardware security systems.

Openalex Percentile: Top 86%
Physical Unclonable Functions (PUFs) and Hardware Security
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Enhancing FPGA Security: An AI-Driven Approach to Root of Trust Architecture — Isha Malhotra, Yogendra Kumar Sharma, et al. · (2025) | TGRS Research Map | TGRS