Effect of Active Layers on Solar Device Structure

Performance of thin film solar cells are very much accepted because of cost effectiveness and good temperature coefficient. This has gained wide application in solar cell technology. Generally, absorber layer, electron transport layer and hole transport layer are three active layers present in solar device structure. The effect of these layers has huge influence on performance these cells. Hence an existing solar device structure is studied and a new device structure is proposed by varying their active layers. Initially a device structure ITO/WS<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>/CdS/Sb<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>Se<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf>/PbS/Au is taken as basic analysis and its performance is studied. The power conversion efficiency is observed as 26.72%. The absorbing layer which is responsible for collection of more photon, is replaced by CIGS in the place of Sb<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>Se<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf>. The performance of solar device structure with CIGS as absorber layer (ITO/WS<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>/CdS/CIGS/PbS/Au) is found to be enhanced. Further, effect of electron transport layer and hole transport layer is observed by replacing WS<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> by IGZO and toxic PbS by CuO respectively. This study gives an improving work function of cell and results in a new solar device structure ITO/IGZO/CdS/CIGS/CuO/Au. The influence of variation in absorber layer, electron transport layer and hole transport layer are performed for open circuit voltage, short circuit current density and fill factor. Effect of temperature on proposed device structure is examined for the range between 300 K and 310 K.