Experimental Analysis of Effects of JFET Region on Single-Event Gate Damage Induced by Heavy Ion in SiC MOSFETs
The effect of the JFET region area of SiC MOSFET on single-event gate damage is discussed. The experiments were carried out on devices with different layout designs. The results show that devices with smaller JFET area have weaker gate damage but larger on-resistance. The mechanism is explained by simulation. Finally, a novel hardened layout design is proposed and validated by experiment.
Authors
- Zhiwen Zhang (ORCID: https://orcid.org/0000-0002-3123-8885)
- Qingwen Song (ORCID: https://orcid.org/0000-0002-0642-4440)
Institutions
- Xidian University (CN)
Publication Details
- Published
- 2025-04-16
- DOI
- https://doi.org/10.1109/icreed65908.2025.11036230
- Primary Topic
- Radiation Effects in Electronics
- Type
- article
- Field-Weighted Citation Impact
- 0.00