Hardware Hybrid Testing Technology Based on Information Flow Path Guidance

Security vulnerabilities in hardware design may affect the normal operation of critical facilities or the leakage and tampering of confidential assets. Three types of methods have been proposed for security detection in the pre-silicon, namely formal verification with high coverage but state explosion problem, simulation test with low running cost but low coverage, and hybrid testing technology combining the two. However, there are still some problems in current research, such as insufficient security vulnerability detection ability and redundant test cases generated. In order to solve the above problems, we propose a hybrid testing technique based on information flow path guidance. PGtest provides accurate vulnerability detection capabilities through path-aware information flow tracking model, and reduces test set by providing path constraints to formal tools through a path selection algorithm. Experiments on the Trust-Hub cryptographic core benchmark show that PGTest can accurately detect security vulnerabilities in hardware design and provide the corresponding minimum number of test cases.