Verification Tool for Securing RISC-V FPGA-Based Process Control System

Industrial Control Systems (ICSs) are a crucial component of critical infrastructure and a popular target for cyberattacks. While most research focuses on the defense of large-scale networks of ICSs, it is critical to expand research on the small-scale networks of Process Control Systems (PCSs), which attackers may target to remain undetectable from the security of the larger network. One potential method of protection for PCS networks is the use of verification tools; however, existing research on verification tools focuses on the detection of attacks without mitigation. This research describes two instantiations of a verification tool for a PCS controlled by a RISC-V computer implemented on an FPGA. The first version of the verification tool provides passive detection, informing an engineering station of an attack, and the second version provides detection with mitigation against unauthorized command messages and malicious software downloads. An experimental testbed was developed to test both versions, consisting of: (1) a circuit to charge a battery; (2) an FPGA controller that controls charge/discharge based on user input; (3) an engineering station that provides control data and updates firmware to the FPGA; and (4) a verification tool that verifies input forwarded by a passive serial tap, connected through the FPGA’s hardware. The experimental data yielded promising results, with the tool successfully providing mitigation and detection against attacks on the serial communication channel between the engineering station and the FPGA. This approach has applicability to common ICS computer devices, such as programmable logic controllers (PLCs).