Fabrication of a Silicon Carbide Probe Card with Through-Wafer Vias

This work presents the fabrication and optimization of a silicon carbide (SiC) probe card for small-scale circuit testing under cryogenic conditions, demonstrating a scalable approach to high-density interconnects in SiC. A key focus is the electroplating of high-aspect-ratio through-wafer vias, addressing challenges such as leakage currents and non-uniform copper (Cu) deposition. Vanadium-doped SiC wafers are used to improve electrical isolation, guiding plating current through the vias. Laser ablation created the vias, followed by metal stack deposition and copper electroplating to achieve low-resistance connections. Additional fabrication steps included photolithographic patterning, palladium probe tip electroplating, and copper bond pad formation. These results demonstrate a refined method for machining and electroplating interconnects in SiC, a material known for its fabrication challenges, paving the way for more advanced SiC-based electronics.