Performance and Reliability Assessment of Schottky Complementary Multi-FinFET Inverter for Advanced Scaling Nodes

This study investigates the performance of Schottky Complementary Multi-FinFET inverter for advanced technology nodes of 7 nm, 5 nm, and 3 nm using Sentaurus TCAD simulations. The impact of scaling on key device parameters, including threshold voltage (V<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub>), subthreshold swing (SS), drain-induced barrier lowering (DIBL), ON-state current (ION), and OFF-state current (IOFF), is systematically investigated. The results indicate that the 5 nm node exhibit superior performance compared to other nodes, with improved electrostatic control, higher drive current (0.00212 for n-FinFET, -1.16x10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-4</sup> for p-FinFET), and lower leakage current, making them suitable for low-power applications. Further, Voltage Transfer Characteristics (VTC) analysis was performed for the 5 nm node, demonstrating sharp transitions with well-defined logic levels and strong voltage gain. Additionally, transient analysis confirms high-speed switching operation with minimal propagation delay, highlighting the feasibility of Schottky-based FinFET inverters for next-generation ultra-scaled digital circuits. Furthermore, a comprehensive reliability assessment was carried out for the 5 nm node, focusing on analog/RF performance and VTC characteristics by varying temperatures from 100 K to 250 K. The study reveals that as temperature increases, there are notable shifts in key parameters, affecting the overall stability and efficiency of the device. The temperature-dependent analysis highlights the robustness of the Schottky-contacted FinFET inverter and provides critical insights into its applicability for future high-performance and energy-efficient logic applications under varying thermal conditions. These findings make the proposed device highly suitable for applications in microprocessors, data converters, IoT systems, and cryogenic computing platforms.

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Publication Details

Journal
IEEE Access
Published
2025-01-01
DOI
https://doi.org/10.1109/access.2025.3581940
Citations
3
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
2.19
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article

Performance and Reliability Assessment of Schottky Complementary Multi-FinFET Inverter for Advanced Scaling Nodes

Prashanth Kumar, Shalini Virumandi
3 citations
IEEE Access
Advancements in Semiconductor Devices and Circuit Design
2.19
article

Performance and Reliability Assessment of Schottky Complementary Multi-FinFET Inverter for Advanced Scaling Nodes

Prashanth Kumar, Shalini Virumandi
article en
3 citations

Abstract

This study investigates the performance of Schottky Complementary Multi-FinFET inverter for advanced technology nodes of 7 nm, 5 nm, and 3 nm using Sentaurus TCAD simulations. The impact of scaling on key device parameters, including threshold voltage (V<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub>), subthreshold swing (SS), drain-induced barrier lowering (DIBL), ON-state current (ION), and OFF-state current (IOFF), is systematically investigated. The results indicate that the 5 nm node exhibit superior performance compared to other nodes, with improved electrostatic control, higher drive current (0.00212 for n-FinFET, -1.16x10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-4</sup> for p-FinFET), and lower leakage current, making them suitable for low-power applications. Further, Voltage Transfer Characteristics (VTC) analysis was performed for the 5 nm node, demonstrating sharp transitions with well-defined logic levels and strong voltage gain. Additionally, transient analysis confirms high-speed switching operation with minimal propagation delay, highlighting the feasibility of Schottky-based FinFET inverters for next-generation ultra-scaled digital circuits. Furthermore, a comprehensive reliability assessment was carried out for the 5 nm node, focusing on analog/RF performance and VTC characteristics by varying temperatures from 100 K to 250 K. The study reveals that as temperature increases, there are notable shifts in key parameters, affecting the overall stability and efficiency of the device. The temperature-dependent analysis highlights the robustness of the Schottky-contacted FinFET inverter and provides critical insights into its applicability for future high-performance and energy-efficient logic applications under varying thermal conditions. These findings make the proposed device highly suitable for applications in microprocessors, data converters, IoT systems, and cryogenic computing platforms.

IEEE AccessVol. 13
Vellore Institute of Technology University (IN)
Affordable and clean energy
Openalex Percentile: Top 12%
Advancements in Semiconductor Devices and Circuit Design
2.19
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