A 5 Gb/s Optoelectronic Receiver IC in 180 nm CMOS for Short-Distance Optical Interconnects

This paper presents a CMOS-based optoelectronic receiver integrated circuit (CORIC) realized in a standard 180 nm CMOS technology for the applications of short-distance optical interconnects. The CORIC comprises a spatially modulated P+/N-well on-chip avalanche photodiode (P+/NW APD) for optical-to-electrical conversion, a dummy APD at the differential input for enhanced common-mode noise rejection, a cross-coupled differential transimpedance amplifier (CCD-TIA) for current-to-voltage conversion, a 3-bit continuous-time linear equalizer (CTLE) for adaptive equalization by using NMOS registers, and a fT-doubler output buffer (OB). The CTLE and fT-doubler OB combination not only compensates the frequency-dependent signal loss, but also provides symmetric differential output signals. Post-layout simulations of the proposed CORIC reveal a transimpedance gain of 53.2 dBΩ, a bandwidth of 4.83 GHz even with a 490 fF parasitic capacitance from the on-chip P+/NW APD, a dynamic range of 60 dB that handles the input photocurrents from 1 μApp to 1 mApp, and a DC power consumption of 33.7 mW from a 1.8 V supply. The CORIC chip core occupies an area of 260 × 101 μm2.

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Publication Details

Journal
Photonics
Published
2025-06-19
DOI
https://doi.org/10.3390/photonics12060624
Primary Topic
Semiconductor Lasers and Optical Devices
Type
article
Field-Weighted Citation Impact
0.00

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article

A 5 Gb/s Optoelectronic Receiver IC in 180 nm CMOS for Short-Distance Optical Interconnects

Sung‐Min Park, Yunji Song
Photonics
Semiconductor Lasers and Optical Devices
article

A 5 Gb/s Optoelectronic Receiver IC in 180 nm CMOS for Short-Distance Optical Interconnects

Sung‐Min Park, Yunji Song
article en

Abstract

This paper presents a CMOS-based optoelectronic receiver integrated circuit (CORIC) realized in a standard 180 nm CMOS technology for the applications of short-distance optical interconnects. The CORIC comprises a spatially modulated P+/N-well on-chip avalanche photodiode (P+/NW APD) for optical-to-electrical conversion, a dummy APD at the differential input for enhanced common-mode noise rejection, a cross-coupled differential transimpedance amplifier (CCD-TIA) for current-to-voltage conversion, a 3-bit continuous-time linear equalizer (CTLE) for adaptive equalization by using NMOS registers, and a fT-doubler output buffer (OB). The CTLE and fT-doubler OB combination not only compensates the frequency-dependent signal loss, but also provides symmetric differential output signals. Post-layout simulations of the proposed CORIC reveal a transimpedance gain of 53.2 dBΩ, a bandwidth of 4.83 GHz even with a 490 fF parasitic capacitance from the on-chip P+/NW APD, a dynamic range of 60 dB that handles the input photocurrents from 1 μApp to 1 mApp, and a DC power consumption of 33.7 mW from a 1.8 V supply. The CORIC chip core occupies an area of 260 × 101 μm2.

PhotonicsVol. 12(6)
Ewha Womans University (KR)
IC Design Education Center, Iran Telecommunication Research Center, Ministry of Science and ICT, South Korea, Institute for Information and Communications Technology Promotion
Affordable and clean energy
Openalex Percentile: Top 88%
Semiconductor Lasers and Optical Devices
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A 5 Gb/s Optoelectronic Receiver IC in 180 nm CMOS for Short-Distance Optical Interconnects — Sung‐Min Park, Yunji Song · Photonics (2025) | TGRS Research Map | TGRS