Feasibility Study of Next-Generation Connectionless IP Router with Ultra-Low Switching Delay for URLLC Services

With the rapid advancement of digital communication technologies, there is an increasing demand for low-latency services, especially Ultra-Reliable Low-Latency Communication (URLLC) required in 5G and future networks. However, despite significant progress, several technical challenges remain unaddressed. To help overcome these issues, we have previously proposed an innovative connectionless (CL) IP router architecture suitable for both edge nodes and core transit nodes. Achieving ultra-low switching delay with minimal delay variation requires novel switching mechanisms. These mechanisms are crucial for mitigating delay fluctuations caused by variations in outgoing traffic volume, and for maintaining the simplicity of connectionless packet-based communication protocols.In this paper, we elucidate the essential mechanisms needed to implement the proposed CL IP switch architecture, aiming to support URLLC services for long-distance real-time communication. Recent progress in CMOS and optoelectronic device integration further enhances the feasibility of implementing a wide range of URLLC network services for 5G and 6G.Assuming a Poisson arrival distribution offers a fundamental basis for analyzing the impact of data traffic on IoT devices, particularly in the development of safety-critical design criteria for switch architecture and simulation. We evaluated the performance of a 4 × 4 switch prototype implemented using commercially available FPGA and System Verilog, incorporating parallel processing at an input/output line transmission speed of 100 Mbps. The measured switching delays were 2.56µs for short packets (32 bytes) and 5.12µs for long packets (64 bytes). The priority packet loss probability was approximately 1.44%, which meets the requirements for URLLC even under high line utilization (0.85) and priority packet ratios of up to 0.9, assuming Poisson-distributed packet arrivals. These results demonstrate that the proposed switch is well-suited for URLLC services, even under heavy traffic conditions.To further enhance data switching efficiency, this study explores the feasibility of incorporating wide range of adaptive asynchronous timeslot allocation into the switch design.

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Published
2025-05-20
DOI
https://doi.org/10.1109/hpsr64165.2025.11038886
Primary Topic
Interconnection Networks and Systems
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article
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article

Feasibility Study of Next-Generation Connectionless IP Router with Ultra-Low Switching Delay for URLLC Services

Noriharu Miyaho, Akihiko Tsukahara, Yoichiro Ueno
Interconnection Networks and Systems
article

Feasibility Study of Next-Generation Connectionless IP Router with Ultra-Low Switching Delay for URLLC Services

Noriharu Miyaho, Akihiko Tsukahara, Yoichiro Ueno
article en

Abstract

With the rapid advancement of digital communication technologies, there is an increasing demand for low-latency services, especially Ultra-Reliable Low-Latency Communication (URLLC) required in 5G and future networks. However, despite significant progress, several technical challenges remain unaddressed. To help overcome these issues, we have previously proposed an innovative connectionless (CL) IP router architecture suitable for both edge nodes and core transit nodes. Achieving ultra-low switching delay with minimal delay variation requires novel switching mechanisms. These mechanisms are crucial for mitigating delay fluctuations caused by variations in outgoing traffic volume, and for maintaining the simplicity of connectionless packet-based communication protocols.In this paper, we elucidate the essential mechanisms needed to implement the proposed CL IP switch architecture, aiming to support URLLC services for long-distance real-time communication. Recent progress in CMOS and optoelectronic device integration further enhances the feasibility of implementing a wide range of URLLC network services for 5G and 6G.Assuming a Poisson arrival distribution offers a fundamental basis for analyzing the impact of data traffic on IoT devices, particularly in the development of safety-critical design criteria for switch architecture and simulation. We evaluated the performance of a 4 × 4 switch prototype implemented using commercially available FPGA and System Verilog, incorporating parallel processing at an input/output line transmission speed of 100 Mbps. The measured switching delays were 2.56µs for short packets (32 bytes) and 5.12µs for long packets (64 bytes). The priority packet loss probability was approximately 1.44%, which meets the requirements for URLLC even under high line utilization (0.85) and priority packet ratios of up to 0.9, assuming Poisson-distributed packet arrivals. These results demonstrate that the proposed switch is well-suited for URLLC services, even under heavy traffic conditions.To further enhance data switching efficiency, this study explores the feasibility of incorporating wide range of adaptive asynchronous timeslot allocation into the switch design.

Tokyo Denki University (JP)
Openalex Percentile: Top 85%
Interconnection Networks and Systems
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Feasibility Study of Next-Generation Connectionless IP Router with Ultra-Low Switching Delay for URLLC Services — Noriharu Miyaho, Akihiko Tsukahara, et al. · (2025) | TGRS Research Map | TGRS