Design and Implementation of a 100Gbps FPGA-Based UPF for 5G Private Networks

5G private networks require a high-performance and efficient User Plane Function (UPF) to support ultra-low latency, high throughput, and advanced traffic management capabilities. In this paper, we present an FPGA-based UPF architecture specifically designed for 5G private networks, achieving 100Gbps packet processing while ensuring full compliance with key functions such as Charging, Quality of Service (QoS), and Traffic Steering. By leveraging FPGA acceleration, our design offloads computationally intensive tasks from general-purpose processors, optimizing packet forwarding and flow management to meet the stringent performance demands of private 5G deployments. Experimental results demonstrate that our architecture significantly improves throughput, reduces latency, and enhances energy efficiency compared to traditional software-based solutions or partial offload FPGA-based solutions, making it a scalable and cost-effective choice for enterprises deploying private 5G networks.