A 28-GHz CMOS Power Amplifier With Adaptive Bias and Phase Compensation for Gain and Phase Linearity Enhancement
This paper presents a 28-GHz PA fabricated in the TSMC 90-nm CMOS process for 5G wireless communication phased-array transmitters. The proposed PA incorporates adaptive bias and phase compensation techniques to effectively mitigate AM-AM and AM-PM distortions, achieving high linearity and efficiency. The design features an envelope detector for dynamic bias adjustment, enhancing transconductance to reduce AM-AM distortion. Furthermore, a varactor-based phase correction mechanism is implemented to minimize AM-PM distortion. This work improves both gain and phase control networks, resulting in significant improvements in key performance metrics, including OP1dB, PAEP1dB, and maximum phase distortion before P1dB. The proposed PA achieves an OP1dB of 14.4 dBm, a PAEP1dB of 33.6%, and a maximum AM-PM distortion of 1.5°, demonstrating exceptional performance and scalability for phased-array applications in next-generation millimeter-wave systems.
Authors
- Z. Li (ORCID: https://orcid.org/0000-0002-8966-8837)
- Liang-Hung Lu (ORCID: https://orcid.org/0000-0001-9556-6565)
- Liang-Chen Tsai
Institutions
- National Taiwan University (TW)
Publication Details
- Journal
- IEEE Transactions on Circuits & Systems II Express Briefs
- Published
- 2025-06-19
- DOI
- https://doi.org/10.1109/tcsii.2025.3581383
- Citations
- 1
- Primary Topic
- Radio Frequency Integrated Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.73