Voltage controlled magnetic tunnel junction based ADC less processing-in-pixel for extreme edge intelligence

The growing data generated by camera sensors has driven the need for energy-efficient solutions to deploy computer vision tasks on edge devices. Processing-in-pixel, which integrates parallel computation within the pixel array, improves energy and bandwidth efficiency by generating output activations of the first neural network layer rather than raw sensor data. This paper proposes an ADC-less processing-in-pixel architecture that implements a binary activation neural network optimized with a Hoyer regularizer for high accuracy in complex vision tasks. Additionally, a global shutter burst memory read scheme is introduced, enabling fast, disturbance-free read operations with nanoscale voltage-controlled magnetic tunnel junctions (VC-MTJs). The proposed algorithmic framework incorporates device and circuit constraints based on fabricated VC-MTJ characteristics and simulations using GlobalFoundries’ 22nm FDX technology. Evaluations on CIFAR10 and ImageNet datasets show 5.04 TOPS/W energy efficiency and a 6× reduction in bandwidth compared to traditional CMOS sensors, without any significant drop in test accuracy.

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Publication Details

Journal
npj Unconventional Computing
Published
2025-06-18
DOI
https://doi.org/10.1038/s44335-025-00029-1
Citations
2
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
1.46

Funders

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article

Voltage controlled magnetic tunnel junction based ADC less processing-in-pixel for extreme edge intelligence

Akhilesh Jaiswal, Pedram Khalili Amiri, Gourav Datta, Ajey P. Jacob et al.
2 citations
npj Unconventional Computing
Advanced Memory and Neural Computing
1.46
article

Voltage controlled magnetic tunnel junction based ADC less processing-in-pixel for extreme edge intelligence

Akhilesh Jaiswal, Pedram Khalili Amiri, Gourav Datta, Ajey P. Jacob, Md Abdullah-Al Kaiser, Peter A. Beerel, Christian Duffee, Jordan Athas
article en
2 citations

Abstract

The growing data generated by camera sensors has driven the need for energy-efficient solutions to deploy computer vision tasks on edge devices. Processing-in-pixel, which integrates parallel computation within the pixel array, improves energy and bandwidth efficiency by generating output activations of the first neural network layer rather than raw sensor data. This paper proposes an ADC-less processing-in-pixel architecture that implements a binary activation neural network optimized with a Hoyer regularizer for high accuracy in complex vision tasks. Additionally, a global shutter burst memory read scheme is introduced, enabling fast, disturbance-free read operations with nanoscale voltage-controlled magnetic tunnel junctions (VC-MTJs). The proposed algorithmic framework incorporates device and circuit constraints based on fabricated VC-MTJ characteristics and simulations using GlobalFoundries’ 22nm FDX technology. Evaluations on CIFAR10 and ImageNet datasets show 5.04 TOPS/W energy efficiency and a 6× reduction in bandwidth compared to traditional CMOS sensors, without any significant drop in test accuracy.

npj Unconventional ComputingVol. 2(1)
Northwestern University (US), University of Southern California (US), University of Wisconsin–Madison (US), Case Western Reserve University (US)
National Science Foundation
Affordable and clean energy
Openalex Percentile: Top 17%
Advanced Memory and Neural Computing
1.46
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Voltage controlled magnetic tunnel junction based ADC less processing-in-pixel for extreme edge intelligence — Akhilesh Jaiswal, Pedram Khalili Amiri, et al. · npj Unconventional Computing (2025) | TGRS Research Map | TGRS