A PVT-Robust FIA with 60.5 dB DC Gain and 5.2 MHz Bandwidth for Energy-Efficient Switched Capacitor Circuits

Advances in IoT and bioelectronics have heightened the demand for energy-efficient circuit and system designs. The floating inverter amplifier (FIA), with its novel circuit design, high linearity, low noise, and low power consumption, has become a leading solution for implementing switched-capacitor (SC) circuits in ADCs. To address the limited gain of conventional FIAs, this work proposes a cascode-based core module that enhances output impedance, thereby significantly improving gain. Additionally, an optimized split-gate voltage technique is integrated to expand output swing, while a correlated level-shifting (CLS) method further amplifies gain. Simulations confirm a DC gain of 60.3 dB, a unity-gain bandwidth of 5.2 MHz, and power consumption of 14.4 μW at 1.8 V, with robust performance across process, voltage, and temperature (PVT) variations.

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Publication Details

Published
2025-04-18
DOI
https://doi.org/10.1109/eeice65049.2025.11034256
Citations
1
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
0.67
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article

A PVT-Robust FIA with 60.5 dB DC Gain and 5.2 MHz Bandwidth for Energy-Efficient Switched Capacitor Circuits

Yaohua Xu, Yuesheng Zhang, Yi Wang, Bai Na
1 citations
Analog and Mixed-Signal Circuit Design
0.67
article

A PVT-Robust FIA with 60.5 dB DC Gain and 5.2 MHz Bandwidth for Energy-Efficient Switched Capacitor Circuits

Yaohua Xu, Yuesheng Zhang, Yi Wang, Bai Na
article en
1 citations

Abstract

Advances in IoT and bioelectronics have heightened the demand for energy-efficient circuit and system designs. The floating inverter amplifier (FIA), with its novel circuit design, high linearity, low noise, and low power consumption, has become a leading solution for implementing switched-capacitor (SC) circuits in ADCs. To address the limited gain of conventional FIAs, this work proposes a cascode-based core module that enhances output impedance, thereby significantly improving gain. Additionally, an optimized split-gate voltage technique is integrated to expand output swing, while a correlated level-shifting (CLS) method further amplifies gain. Simulations confirm a DC gain of 60.3 dB, a unity-gain bandwidth of 5.2 MHz, and power consumption of 14.4 μW at 1.8 V, with robust performance across process, voltage, and temperature (PVT) variations.

Anhui University (CN)
Affordable and clean energy
Openalex Percentile: Top 30%
Analog and Mixed-Signal Circuit Design
0.67
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