Multi-Objective Optimized Design Method of PCB Parasitic Inductance Parameters in SiC MOSFET Driving and Power Circuit

As a typical wide bandgap semiconductor device, Silicon carbide MOSFET is more suitable for high-frequency and high-voltage applications. However, its high-speed switching characteristics make it highly sensitive to parasitic inductance parameters in SiC MOSFET driving and power circuit, resulting in severe switching oscillations and process-related issues during switching transients. In this paper, a multi-objective optimized design method of the PCB inductance parasitic parameters of SiC MOSFET driving and power circuit is proposed. The switching model considering parasitic parameters is established, and the variation law of each performance index of SiC MOSFET with parasitic inductance is revealed by simulation. The optimization design method of PCB parasitic parameters considering multiple performance indexes of the device is summarized. The experimental results show that this method can optimize the switching characteristics of SiC MOSFET and give full play to the advantages of high-speed switching of SiC MOSFET, which can provide theoretical basis and design guidance for engineering circuit design.