A fully-integrated dual-mode switched-capacitor DC-DC converter with 75% efficiency for ultra-low-power biosensor systems

This paper presents a fully-integrated dual-mode switched-capacitor (SC) DC-DC converter to supply always-on wake-up timer in biosensor systems. To balance chip area and conversion efficiency, optimal sizes of power switches, flying capacitor (Cfly) and output capacitor (Cout) in SC cell are determined through power loss analysis method. Power-on and self-powered modes (dual modes) under two voltage domains and an on-chip ultra-low-power (ULP) bias circuit are proposed to further improve the conversion efficiency. Furthermore, a hybrid self-biased current (HSBC) scheme is utilized to achieve low output voltage ripple. Implemented with a 40-nm CMOS process, this DC-DC converter can realize the voltage conversion from 1.8 V to 0.4 V. Measurement results show that the peak conversion efficiency reaches 75 % at average load arriving 3 µA, while the voltage ripple is below 12 mV over 10 nA-5 µA load range.

Authors

Institutions

Publication Details

Journal
IEICE Electronics Express
Published
2025-06-18
DOI
https://doi.org/10.1587/elex.22.20250277
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

A fully-integrated dual-mode switched-capacitor DC-DC converter with 75% efficiency for ultra-low-power biosensor systems

Leilei Huang, Yue Lu, Xiao‐Yuan Wu, Runxi Zhang et al.
1 links
IEICE Electronics Express
Analog and Mixed-Signal Circuit Design
article

A fully-integrated dual-mode switched-capacitor DC-DC converter with 75% efficiency for ultra-low-power biosensor systems

Leilei Huang, Yue Lu, Xiao‐Yuan Wu, Runxi Zhang, Shuai Ding, Zitong Zhang, Chunqi Shi
article en

Abstract

This paper presents a fully-integrated dual-mode switched-capacitor (SC) DC-DC converter to supply always-on wake-up timer in biosensor systems. To balance chip area and conversion efficiency, optimal sizes of power switches, flying capacitor (Cfly) and output capacitor (Cout) in SC cell are determined through power loss analysis method. Power-on and self-powered modes (dual modes) under two voltage domains and an on-chip ultra-low-power (ULP) bias circuit are proposed to further improve the conversion efficiency. Furthermore, a hybrid self-biased current (HSBC) scheme is utilized to achieve low output voltage ripple. Implemented with a 40-nm CMOS process, this DC-DC converter can realize the voltage conversion from 1.8 V to 0.4 V. Measurement results show that the peak conversion efficiency reaches 75 % at average load arriving 3 µA, while the voltage ripple is below 12 mV over 10 nA-5 µA load range.

IEICE Electronics ExpressVol. 22(15)
East China Normal University (CN)
Affordable and clean energy
Openalex Percentile: Top 87%
Analog and Mixed-Signal Circuit Design
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.

A fully-integrated dual-mode switched-capacitor DC-DC converter with 75% efficiency for ultra-low-power biosensor systems — Leilei Huang, Yue Lu, et al. · IEICE Electronics Express (2025) | TGRS Research Map | TGRS