A Comprehensive Analysis of Low Power VLSI using CNTFET and GDI Technology

Low-power Very Large-Scale Integration (VLSI) using Carbon Nanotube Field-Effect Transistor (CNTFET) and Gate Diffusion Input (GDI) technology integrates nanomaterials for power consumption reduction. The CNTFET offers high-speed operation, while GDI minimizes transistor count and power consumption, making the model suitable for low-power applications. However, high power consumption and additional chip area occur due to inefficient circuit design and integration in low-power VLSI circuits using CNTFET and GDI technology. In this analysis, arithmetic and signal processing combinational circuits, are analyzed for low-power VLSI in CNTFET and GDI technology. In the arithmetic circuit, the full adder based on dynamic threshold, 6-transistor full adder, and in the signal processing unit, the 4-bit unary decoder and multiplexer are implemented in the combinational circuit. The power consumption, latency, PDP, and energy consumption are considered as the performance metrics of the methods.

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Publication Details

Published
2025-04-25
DOI
https://doi.org/10.1109/icdcece65353.2025.11035549
Citations
1
Primary Topic
Low-power high-performance VLSI design
Type
article
Field-Weighted Citation Impact
0.73
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A Comprehensive Analysis of Low Power VLSI using CNTFET and GDI Technology

Movva Pavani, K. Kishore Kumar, Jayakrishna Padala
1 citations
Low-power high-performance VLSI design
0.73
article

A Comprehensive Analysis of Low Power VLSI using CNTFET and GDI Technology

Movva Pavani, K. Kishore Kumar, Jayakrishna Padala
article en
1 citations

Abstract

Low-power Very Large-Scale Integration (VLSI) using Carbon Nanotube Field-Effect Transistor (CNTFET) and Gate Diffusion Input (GDI) technology integrates nanomaterials for power consumption reduction. The CNTFET offers high-speed operation, while GDI minimizes transistor count and power consumption, making the model suitable for low-power applications. However, high power consumption and additional chip area occur due to inefficient circuit design and integration in low-power VLSI circuits using CNTFET and GDI technology. In this analysis, arithmetic and signal processing combinational circuits, are analyzed for low-power VLSI in CNTFET and GDI technology. In the arithmetic circuit, the full adder based on dynamic threshold, 6-transistor full adder, and in the signal processing unit, the 4-bit unary decoder and multiplexer are implemented in the combinational circuit. The power consumption, latency, PDP, and energy consumption are considered as the performance metrics of the methods.

G Pulla Reddy Dental College & Hospital (IN), Institute of Chartered Financial Analysts of India (IN)
Affordable and clean energy
Openalex Percentile: Top 27%
Low-power high-performance VLSI design
0.73
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