CNTFET - Based Mixed Logic Line Decoder for Low Power Applications

In Digital systems, the conversion of coded data is an important factor. A decoder is used to convert the coded data into binary information. The carbon nanotube field-effect transistors (CNTFETs) are chosen over Complementary metal-oxide-semiconductors for designing the decoder circuits because they reduce the leakage currents and short channel effects. The decoders with mixed logic like Dual Value Logic and Transmission logic are designed using Stanford 32 nm CNTFET implemented in this study. Two configurations are implemented with 14 transistors and 15 transistors in the same technology. 14 Transistor design mainly focuses on the reduction of transistor count and power. 15 Transistors design focuses on the reduction of delay. All proposed decoder designs are compared with CMOS designs. As a result, the proposed decoders show 37.01 %, 14.07 %, and 45.87 % improvement in delay, power, and energy compared to existing circuits. The proposed decoders are simulated using the HSPICE simulator.