Current Harmonics Suppression Scheme for Hysteresis Current Based ZVS Grid-Tied Inverters

For the hysteresis current-based zero voltage switching (HC-ZVS) inverter with an LCL filter, numerous harmonics will be generated in the grid current if the point of common coupling (PCC) voltage is distorted. However, the existing effective solutions for suppressing current harmonics in LCL inverters exhibit significant drawbacks when applied to HC-ZVS inverters, including the inability to calculate parameters and failure in harmonic rejection. To address this issue, this article proposes a dedicated PCC voltage feedforward scheme to eliminate grid current harmonics of the HC-ZVS grid-tied inverter. It is demonstrated that grid current harmonics caused by the distorted PCC voltage can be significantly suppressed by feeding forward only the derivative term of the PCC voltage to the hysteresis-band reference. The effectiveness of the proposed scheme and the stability of the system are thoroughly analyzed. Finally, a 1-kW single-phase HC-ZVS grid-tied inverter prototype was built, and experiments were conducted to verify the effectiveness and practical value of the proposed scheme.